A printed circuit board (“PCB”) is a multilayer plastic board that includes printed circuits on one or more layers of insulative material. A printed circuit is a pattern of conductors that corresponds to the wiring of an electronic circuit formed on one or more layers of insulative material. The printed circuit board includes electrical traces that are routed on the various layers of the PCB. PCBs also include vias which are solid electrical paths connecting one layer to another layer. A via can be used to connect a trace on one layer of a PCB to another trace on another layer of the PCB.
A PCB also includes other layers of metallization for ground planes, power planes or reference voltage planes. In many instances a signal carrying via must be routed through one or more of these planes. The signal carrying via can not electrically connect or couple to these planes. If the signal carrying via does couple or connect to one of these planes, the integrity of the electrical circuit is compromised. As a result, anti-pads or plane clearances, are required to separate signal carrying vias from ground planes, power planes, or planes having a reference voltage. An anti-pad is a plane clearance. Generally, a minimum anti-pad clearance is specified in the design after balancing factors that tend to minimize the anti-pad size and those factors that tend to maximize anti-pad size. The anti-pads would be minimized to reduce noise by closely shielding adjacent pins with reference planes, to reduce electromagnetic interference (EMI) by minimizing aperture sizes in reference planes, and to maintain a strong reference to ground for single-ended signals and ground referenced differential signals. The anti-pads would be maximized to maximize voltage breakdown spacing between the pin and the reference plane, to increase manufacturability by reducing the chance of shorting, and reduce reflection in a high speed gigabit serial system by reducing the capacitive effect of a plated through hole (used instead of a via).
The semiconductor industry has seen tremendous advances in technology in recent years that have permitted dramatic increases in circuit density and complexity, and equally dramatic decreases in power consumption and package sizes. Present semiconductor technology now permits single-chip microprocessors with many millions of transistors, operating at speeds of tens (or even hundreds) of MIPS (millions of instructions per second), to be packaged in relatively small, air-cooled semiconductor device packages. A by-product of such high density and high functionality in semiconductor devices is an ever increasing pressure to produce PCBs having higher density designs. With increasingly higher density designs, the risk becomes greater that the established industry reliability specification for minimum dielectric spacing between hole wall and adjacent conductive features will be violated. There is also a possibility that with increased device density, the industry will lower the minimum dielectric spacing between features.
Currently, there is no real-time process or method established to test individual PCBs for minimum inner layer coplanar dielectric spacing violations. In other words, there is no real-time process or method established to test a PCB to determine if the anti-pads meet specifications. Currently, destructive testing in the form of cross-sectional analysis is used to test minimum inner layer coplanar dielectric spacing. In an environment where each PCB is to be tested before populating the board with expensive components, destructive testing is not an option. Specialized processes, such as PerfecTest (available from American Testing Corporation, 18348 Redmond Way, Redmond, Wash. 98052), utilize coupons added to the manufacturing panel to align between levels or determine the cause of misalignment for a number of PCBs. The coupons do not allow for testing of individual PCBs within the manufacturing panels.
The description set out herein illustrates the various embodiments of the invention and such description is not intended to be construed as limiting in any manner.